5 core members from the mature team, the cumulative shipment of electronically controlled MCUs in the front section of the team exceeds 1.5 billion, and the engineering and mass production capacity has been verified.
1. Responsible for the design, simulation, verification, parameter optimization, performance iteration, and reliability convergence of the company's analog/mixed-signal chip modules to ensure that the chip indicators meet the specifications.
2. Responsible for the design and iterative optimization of commonly used analog IP, including but not limited to IO, LDO, OPA, Comparator, ADC/DAC, HRC, PLL, reference source, driver circuit, etc., familiar with CMOS and BCD processes, and independently complete module-level and system-level circuit design and simulation verification.
3. In the digital-analog hybrid circuit, the interface definition and mixing verification are carried out in cooperation with the digital engineer, and different abstract modeling of the analog module can be mixed and simulated.
4. Cooperate with the layout engineer to complete layout planning, layout matching of key modules, parasitic optimization, and DRC/LVS problem rectification, and control the simulation layout matching, symmetry, anti-interference, and parasitic sensitive paths to ensure circuit stability and consistency.
4. Assist the chip flow process, including self-inspection before tapeout, document archiving, process node adaptation, risk point assessment, and output complete design reports, simulation reports, test specifications, and other technical documents.
5. Participate in bring-up, performance testing, problem positioning, fib/debug analysis and repair iteration, complete circuit optimization for temperature drift, noise, misalignment, stability, reliability and other issues, and support product mass production.
6. Follow up the fab processEvolution and new process performance evaluation, follow up IP new architecture new technology.
7. Cooperate with the product, testing, and application teams to complete program review, technical question answering, and customer demand iteration, and support product marketization.
1. Bachelor degree or above, major in microelectronics, integrated circuit design, electronic science and technology, electronic information, solid analog circuit, semiconductor device physics, CMOS process foundation.
2. 1-5 years of analog IC design experience, with complete chip/module closed-loop experience from design, simulation, layout, tape, testing to mass production.
3. Familiar with the full set of EDA tools for analog IC design, and familiar with the Linux operating environment.
4. Familiar with the principles of various analog basic circuits and core modules, familiar with the design points of power supply and signal chain circuits, and master the optimization methods of key indicators such as misalignment, temperature drift, noise, PSRR, load response, and loop stability.
5. Familiar with CMOS process characteristics, understand layout matching principles, parasitic effects, Latch-up, ESD, and reliability design fundamentals, and can independently solve common problems in design, tape, and testing.
6. Have good problem solving ability, logical thinking and document ability, can independently output design plans, simulation data, iterative summary, rigorous and meticulous, strong compression resistance.
7. With good teamwork ability, it can efficiently connect the layout, digital, testing, and product teams to promote project delivery on schedule.